As discussed in U.S. Pat. No. 3,458,925 and in the IBM-Technical Disclosure Bulletin (TDB) article "Double Mask System For Solder Bump Formation" by P. A. Totta pp. 2734-2735 Vol. 22, No. 7, December 1977 this solder pad deposition step is performed at substantially the final stages of silicon wafer processing, before the dicing of the wafers into chips. The silicon wafers which have been subject to the different processing steps (epitaxy, diffusion, oxidation, metallurgy, passivation, . . . ) are ready to receive the solder pads.
First, apertures or contact vias in accordance with a required configuration or pattern are formed into the upper isolating or passivating layers of the wafers and, then, the solder or ball limiting metallurgy, BLM, (generally, a disc-shaped chromium-copper-gold multilayer, see the aforesaid U.S. Pat. No. 3,458,925), is formed in and around these apertures or vias. The final step, therefore, comprises forming the solder pads, more typically, bumps or balls at the emplacements of these contact discs in order to be subsequently used as input/output contacts for the chips.
As noted above, a conventional process of forming such solder pads is disclosed in the aforesaid U.S. Pat. No. 3,458,925, and an improvement thereof is disclosed in the above noted IBM Technical Disclosure Bulletin, Article of P. A. Totta.
Such a process, heretofore, typically included the following steps:
Masking the surface of the semiconductor wafer, generally by means of a metal mask, so as to expose the limiting areas comprised of the BLM discs as well as the area immediately adjacent to each of these discs for each chip; PA1 Vacuum-evaporating a thin layer of solder, through a mask, using a R.F. induction heated crucible, containing the solder, and removing the mask; PA1 Heating the wafer to the solder melting point so that said solder shrinks and its surface strain changes it for reflow into a bump or ball; and finally, PA1 Cooling the wafer so as to set the solder. PA1 1. Coupling fluctuations between the induction coil and the crucible, are inevitable (because they are bound to various parameters some of which are difficult to control, such as, for instance, cooling temperature of water coil, variations in the source volume during evaporation, etc.). These fluctuations which are difficult to control have a strong influence upon the evaporation rates which are neither constant nor reproducible. As a consequent large discrepancies result in the characteristics of such R.F. evaporated films. PA1 2. Still more important is the formation of projections, the so-called spitting phenomenon, which randomly occurs during evaporation, thereby generating imperfect deposits. A possible explanation is that the evaporation is sometimes impeded by the formation of a membrane comprised of oxided compounds located at the surface of the melt until the pressure difference between the melt and the vacuum chamber becomes sufficient to break the membrane, which brings about an explosion which projects significant amounts of material in the direction of the wafers, and which often chokes completely or partially fills the holes in the metal mask. This results in either missing pads or pads not having the required size. In every respect, the chips having a single one of these imperfections, are discarded. As a rule, a few percentages of the manufacture are disclosed before the chips are arranged or mounted upon ceramic supporting modules. A solution to this problem is to lower the deposition rate, but with the obvious drawback of increasing the cycle time to such an extent that this solution cannot be envisaged from an industrial or economic point of view. PA1 1. Increasing the quality of the deposited films and giving reproducible results (thickness, composition), whatever be the material to be deposited (Pb, Sn, In . . . ), and this with consistency from batch to batch; PA1 2. Increasing the throughput by reducing the number of the imperfect or missing solder pads; PA1 3. Reducing the manufacturing cost owing to an improved yield capacity, with shorter cycle times and longer lifetimes for the crucibles; PA1 4. Simplifying the vacuum-evaporation equipment. PA1 a crucible which is comprised of a bent-cone V-shaped tantalum liner placed in a recess of a copper pot or hearth, and in spaced relationship therewith it, in order to limit the thermal exchanges or transfers between them. The liner contains the source of the material to be evaporated, such as: Pb-Sn or Pb-In solder. The electron beam is focused on to the center of the source. The substrate carrier is formed of a several tiered dome which is rotatively mobile and associated with a removable shield which is placed between the source and the substrates during lead evaporation and which is removed during tin evaporation. A ion collector gauge monitors the transition from lead to tin evaporation. Illustrative domes can be found described in the IBM-TDB article "Drive Mechanism For Rotating Dome In A Metal Evaporator" by H. W. Mock et al., pp. 2382-2383, Vol. 14, No. 8, January 1972; the IBM-TDB article "Semiconductor Wafer Dome For An Evaporator" by G. P. Dahlke et al., p. 2171, Vol. 18, No. 7, December 1975; the IBM-TDB article "Wafer Holder For Evaporation" by C. G. Lennon, Jr., pp. 5354-5355, Vol. 22, No. 12, May 1980; the IBM-TDB article "Evaporation Dome" by C. G. Lennon, Jr., p. 4913, Vol. 23, No. 11, April 1981; the IBM-TDB article "High Capacity Metal Deposition Wafer Domes" by W. J. Curry et al., p. 555, Vol. 22, No. 2, July 1979; and the IBM-TDB article "Thermally Controlled Rotating Master Dome" by J. F. Cosgrove et al., pp. 5995-5999, Vol. 24, No. 11B, April 1982.
Such a conventional R.F. induction or heated crucible vacuum-evaporation process has two major drawbacks. In such a process, the bulk of the source contained in the heated crucible, is heated. This results in that:
In addition, it is well known that recent microelectronic developments are based on an increasing miniaturization of the various elementary components whether they are active (transistors, diodes, . . . ) or passive (resistors, . . . ) thereby leading to a high scale integration.
Furthermore, an increasing number of logic and/or analog functions are intergrated upon a single chip.
As a result therefor, a considerable increase in the number of the solder pads is reduced for each chip in order to insure the exchange of the electrical signals between the chip and the off-chip circuits.
The medium scale integration chips (MSI) have had so far about twenty solder pads; the large scale integration chips have had about one hundred of them. With integration approaching one million circuit components, the very large scale integration is achieved (VLSI) with the resulting need for achieving chips having several hundred solder pads.
The conventional techniques for vacuum deposition of solder pads by R.F. induction, cannot meet this requirement since the sizes of the pads must be increasingly smaller, and it is mandatory to have a closer control of the parameters such as, for instance, composition and volume, for the pad definition. The above-mentioned spitting phenomenon would also cause a too large a number of imperfect pads and would, in connection with the required number of the plots, lead to discarding or scrapping an increasing and larger quantity of the chips, which cannot possibly be envisaged or tolerated economically.